;PFR3A firmware bug fix 12/7/10

;copywrite by Steven Weber KD1JV and Hendricks kits
;for hobby use only
;scource code maybe modified to inhance functionality, but must be freely distributed
;and used only with the Hendricks kits PFR-3A product. Not to be used for any 
;commercial product.  

.include	"m48def.inc"

.def	dd0	=r0
.def	dd1	=r1
.def	dd2	=r2
.def	dd3	=r3
.def	dd4	=r4
.def	dd5	=r5

.def	dv0	=r6
.def	dv1	=r7
.def	dv2	=r8
.def	dv3	=r9

.def	dr0	=r10
.def	dr1	=r11
.def	dr2	=r12
.def	dr3	=r13
.def	de_bcd0	=r14
.def	de_bcd1	=r15

.def	fbin0	=r8
.def	fbin1	=r9
.def	fbin2	=r10
.def	fbin3	=r11
.def	bcd0	=r12
.def	bcd1	=r13
.def	bcd2	=r14
.def	bcd3	=r15


.def	temp 	=r16
.def	stemp 	=r17
.def	count 	=r18
.def	flags 	=r19
.def	dotcnt	=r20
.def	kcnst	=r21
.def	dlycnt	=r22
.def	flag2	=r23
.def	mrenc	=r24
.def	eadr	=r25
.def	dscnt	=r26

;r26 xl
;r27 xh
;r28 yl
;r29 yh
;r30 zl
;r31 zh

.equ	FDS1		=5
.equ	FDS2		=6
.equ	FDS3		=4
.equ	FDS4		=7

.equ	MUTE		=2
.equ	TXEN		=4
.equ	SIDETONE	=3
.equ	SDATA		=5
.equ	SCLK		=0
.equ	DDSEN		=1

.equ	DOTIN		=3
.equ	DASHIN		=2

.equ	FL_SIDETONE	=$01
.equ	FL_DOT		=$02
.equ	FL_DASH		=$04
.equ	FL_STKEY	=$08
.equ	FL_ENMEM	=$10
.equ	FL_BMODE	=$20
.equ	FL_RIT		=$40
.equ	FL_EXE		=$80

.equ	F_SIDETONE	=0
.equ	F_DOT		=1
.equ	F_DASH		=2
.equ	F_STKEY		=3
.equ	F_ENMEM		=4
.equ	F_BMODE		=5
.equ	F_RIT		=6
.equ	F_EXE		=7

.equ	F2_B40		=$01
.equ	F2_B30		=$02
.equ	F2_B20		=$04
.equ	F2_FSTN		=$08
.equ	F2_NOTX		=$10
.equ	F2_DFE		=$20
.equ	F2_OFADD	=$40

.equ	F_B40		=0
.equ	F_B30		=1
.equ	F_B20		=2
.equ	F_FSTN		=3
.equ	F_NOTX		=4
.equ	F_DFE		=5
.equ	F_OFADD		=6

.equ	fdig1		=$100
.equ	fdig2		=$101
.equ	fdig3		=$102
.equ	fdig4		=$103

.equ	altdig1		=$104
.equ	altdig2		=$105
.equ	altdig3		=$106
.equ	altdig4		=$107	

.equ	fbin	=$108
;109
;10a
;10b


.equ	ftword	=$10c
;10d
;10e
;10f
.equ	frcv	=$110
;111
;112
;113

.equ	rit_b	=$114
;115
;116
;117


.equ	fbcd0	=$118
.equ	fbcd1	=$119
.equ	fbcd2	=$11a
.equ	fbcd3	=$11b

.equ	ref_fre	=$11c
.equ	foffset	=$120

.equ	fstep	=$124
.equ	cdsp	=$125
.equ	cdak	=$126
.equ	cs_bcd	=$127

.equ	limith	=$128
;129
;12a
;12b
.equ	limitl	=$12c
;12d
;12e
;12f
.equ	fts2	=$130
;131
;132
.equ	fts3	=$133
;134
;135
.equ	fts4	=$136
;137
;138


.equ	kmem	=$140
.equ	ram_end =$7f

.equ	atbcd0	=$0c
.equ	atbcd3	=$0f

.org	$0000

		rjmp	reset		;1
		reti				;2
		nop					;3
		nop					;4
		reti				;5
		reti				;6
		nop					;7
		nop		;8
		nop					;9
		nop				;10
		nop					;11
		rjmp	timer1		;12
		nop					;13
		nop					;14
		rjmp	dsout		;15
		nop
		nop
		nop
		nop
		nop
		nop
		reti

		
timer1:	in		stemp,sreg
		inc		dlycnt
		out		sreg,stemp
		reti




dsout:	in		stemp,sreg
		dec		kcnst
		brne	tm1
		inc		dotcnt
		lds		kcnst,cdak
tm1:	sbrc	flags,F_SIDETONE
		sbi		pinc,3
		ser		r27
		out		portb,r27
		lsl		dscnt
		sbrc	dscnt,1
		rjmp	dout2
		sbrc	dscnt,2
		rjmp	dout3
		sbrc	dscnt,3
		rjmp	dout4
		
dout1:  cbi		portd,FDS4
		lds		dscnt,fdig1
		out		portb,dscnt
		sbi		portd,FDS1
		sbrc	flags,F_RIT
		cbi		portb,0
		ldi		dscnt,$01
		rjmp	dext

dout2:	
		cbi		portd,FDS1
		lds		dscnt,fdig2
		out		portb,dscnt

		sbi		portd,FDS2
		ldi		dscnt,$02
		rjmp	dext

dout3:	cbi		portd,FDS2
		lds		dscnt,fdig3
		out		portb,dscnt
		sbi		portd,FDS3
		cbi		portb,0
		ldi		dscnt,$04
		rjmp	dext

dout4:	cbi		portd,FDS3
		lds		dscnt,fdig4
		out		portb,dscnt
		sbi		portd,FDS4
		ldi		dscnt,$08
		
	
dext:	out		sreg,stemp
		reti


reset:	clr		temp
		out		mcusr,temp
		sts		wdtcsr,temp
		ldi		temp,high(ramend)
		out		sph,temp
		ldi		temp,low(ramend)
		out 	spl,temp	;prg counter

	
		ldi		temp,$ff	;port b setup
		out		ddrb,temp
		ldi		temp,$f3	;port d setup
		out		ddrd,temp
		ser		temp
		out		portb,temp
		ldi		temp,$0f
		out		portd,temp
		ldi		temp,$fc
		out		ddrc,temp
		ldi		temp,$0c
		out		portc,temp


		ldi		temp,$21
		cbi		portd,DDSEN
		rcall	sout
		clr		temp
		rcall	sout
		sbi		portd,DDSEN
		
		ldi		kcnst,$19
		sts		cdak,kcnst
		ldi		temp,$0f
		sts		cdsp,temp
		ldi		temp,$20
		sts		cs_bcd,temp
			
		ldi		dscnt,$01
		ldi		temp,50
		sts		fstep,temp

		clr		flags
		clr		flag2

		ldi		temp,$02
		out		tccr0a,temp
		ldi		temp,$03		;03
		out		tccr0b,temp
		ldi		temp,104
		out		ocr0a,temp
		
		ldi		temp,$02
		sts		timsk0,temp

		ldi		temp,$0b
		sts		tccr1b,temp
		ldi		temp,$0c
		sts		ocr1ah,temp
		ldi		temp,$35
		sts		ocr1al,temp
		ldi		temp,$02
		sts		timsk1,temp


		ldi		temp,$01
		sts		pcmsk1,temp
		ldi		temp,$0c
		sts		pcmsk2,temp
		ldi		temp,$c6
		sts		prr,temp
		ldi		temp,$61
		sts		admux,temp
		ldi		temp,$e6
		sts		adcsra,temp
		ldi		temp,$02
		sts		didr0,temp

		ser		temp
		sts		fts2+2,temp
		sts		fts3+2,temp
		sts		fts4+2,temp


		clr		temp
		out		eearh,temp
		ldi		eadr,$90
		rcall	rdeed
		sts		ref_fre,mrenc
		rcall	rdeed
		sts		ref_fre+1,mrenc
		rcall	rdeed
		sts		ref_fre+2,mrenc
		rcall	rdeed
		sts		ref_fre+3,mrenc

		cpi		mrenc,$2f
		breq	ref_ok

		clr		temp
		sts		ref_fre,temp
		ldi		temp,$08	;50mhz
		sts		ref_fre+1,temp
		ldi		temp,$af	;50mhz
		sts		ref_fre+2,temp
		ldi		temp,$2f	;50mhz
		sts		ref_fre+3,temp

ref_ok:	rcall	rdeed
		sts		foffset,mrenc
		rcall	rdeed
		sts		foffset+1,mrenc
		rcall	rdeed
		sts		foffset+2,mrenc
		rcall	rdeed
		sts		foffset+3,mrenc

		cpi		mrenc,$01
		breq	off_ok

		ldi		temp,$5f ;50 mhz
		sts		foffset,temp
		ldi		temp,$9f	;50mhz
		sts		foffset+1,temp
		ldi		temp,$92	;50mhz
		sts		foffset+2,temp
		ldi		temp,$01
		sts		foffset+3,temp

off_ok:	rcall	rdeed
		mov		flags,mrenc
		cbr		flags,$df
		clr		temp
		out		eearh,temp
		sts		fdig1,temp
		sts		fdig2,temp
		sts		fdig3,temp
		sts		fdig4,temp

		sei

rr_02:	clr		dlycnt
rr_01:	cpi		dlycnt,20
		brne	rr_01
		
		sbic	pinc,0
		rjmp	rst1
		sbis	pind,DOTIN
		rjmp	cal_rf



rst1:	sbis	pind,DASHIN		;test for straight key
		sbr		flags,FL_STKEY

band:	cbi		portc,MUTE
		cbr		flags,FL_RIT
		cbr		flag2,F2_OFADD+F2_B40+F2_B30+F2_B20
		lds		temp,adch
		cpi		temp,120
		brsh	band40
		cpi		temp,70
		brsh	band30
		
band20:	
		lds		temp,fts2+2
		cpi		temp,$ff
		breq	ld20
		lds		dd3,fts2
		lds		dd4,fts2+1
		lds		dd5,fts2+2
		rjmp	con2
ld20:	ldi		temp,$e0
		mov		dd3,temp
		ldi		temp,$89
		mov		dd4,temp
		ldi		temp,$d6
		mov		dd5,temp

con2:	ldi		temp,$d5
		sts		limitl,temp
		ldi		temp,$9f
		sts		limitl+1,temp
		ldi		temp,$80
		sts		limitl+2,temp

		ldi		temp,$da
		sts		limith,temp
		ldi		temp,$f6
		sts		limith+1,temp
		ldi		temp,$b0
		sts		limith+2,temp

		sbr		flag2,F2_B20
		ldi		temp,$07
		sts		fdig1,temp
		ldi		temp,$11
		sts		fdig2,temp
		ser		temp
		sts		fdig3,temp
		sts		fdig4,temp
		rjmp	rr_00

band30:	rjmp	bnd30

band40:	
		sbr		flag2,F2_OFADD
		lds		temp,fts4+2
		cpi		temp,$ff
		breq	ld40
		lds		dd3,fts4
		lds		dd4,fts4+1
		lds		dd5,fts4+2
		rjmp	con4

ld40:	ldi		temp,$f0
		mov		dd3,temp
		ldi		temp,$44
		mov		dd4,temp
		ldi		temp,$6b
		mov		dd5,temp
con4:	ldi		temp,$6a
		sts		limitl,temp
		ldi		temp,$cf
		sts		limitl+1,temp
		ldi		temp,$c0
		sts		limitl+2,temp

		ldi		temp,$6f
		sts		limith,temp
		ldi		temp,$63
		sts		limith+1,temp
		ldi		temp,$a0
		sts		limith+2,temp	
	

		sbr		flag2,F2_B40
		ldi		temp,$c9
		sts		fdig1,temp
		ldi		temp,$11
		sts		fdig2,temp
		ser		temp
		sts		fdig3,temp
		sts		fdig4,temp
		rjmp	rr_00

bnd30:	
		lds		temp,fts3+2
		cpi		temp,$ff
		breq	ld30
		lds		dd3,fts3
		lds		dd4,fts3+1
		lds		dd5,fts3+2
		rjmp	con3
ld30:	ldi		temp,$30
		mov		dd3,temp
		ldi		temp,$44
		mov		dd4,temp
		ldi		temp,$9a
		mov		dd5,temp

con3:	ldi		temp,$9a
		sts		limitl,temp
		ldi		temp,$1d
		sts		limitl+1,temp
		ldi		temp,$20
		sts		limitl+2,temp

		ldi		temp,$9a
		sts		limith,temp
		ldi		temp,$e0
		sts		limith+1,temp
		ldi		temp,$70
		sts		limith+2,temp

		ldi		temp,$43
		sts		fdig1,temp
		ldi		temp,$11
		sts		fdig2,temp
		ser		temp
		sts		fdig3,temp
		sts		fdig4,temp
		sbr		flag2,F2_B30

rr_00:	ldi		temp,$60
		sts		admux,temp
		ldi		temp,$e6
		sts		adcsra,temp
		clr		dlycnt
bn_dly: cpi		dlycnt,20
		brne	bn_dly

		rcall	offset
		rcall	rx_frq
		sbi		portc,MUTE		
				
wait1:  ldi		temp,$61
		sts		admux,temp
		clr		dlycnt
wdly:	cpi		dlycnt,2
		brne	wdly

		ldi		count,20

wait:	cpi		dlycnt,$ff
		brne	wait0
		clr		dlycnt
		dec		count
		brne	wait0
		rjmp	idle
wait0:	sbrc	flags,F_STKEY		;poll buttons
		rjmp	wait3
		sbis	pind,DASHIN
		rjmp	pdin_h
		sbis	pind,DOTIN
		rjmp	pdin_t
wait2:	sbis	pinc,0
		rjmp	swdec

wait4: lds		temp,adch

		cpi		temp,120
		brsh	ts40
		cpi		temp,70
		brsh	ts30
		sbrs	flag2,F_B20
		rjmp	bdch
		rjmp	wait

ts40:	sbrs	flag2,F_B40	
		rjmp	bdch
		rjmp	wait

ts30:	sbrs	flag2,F_B30
		rjmp	bdch
		rjmp	wait

bdch:	clr		dlycnt
bn_dy:	cpi		dlycnt,40
		brne	bn_dy
		rjmp	band

wait3:	sbis	pind,DOTIN
		rjmp	sktx
		rjmp	wait2
	
switch1:	rjmp	speed
switch2:	rjmp	rit
switch3:	rjmp	tndn
switch4:	rjmp	tnup


swdec:	ldi		temp,$60
		sts		admux,temp
		clr		dlycnt
wdly1:	cpi		dlycnt,2
		brne	wdly1
		lds		temp,adch
		cpi		temp,230
		brsh	wait4
		cpi		temp,90
		brsh	switch4
		cpi		temp,70
		brsh	switch3
		cpi		temp,40
		brsh	switch2
		rjmp	switch1


idle:
		ldi		temp,$05
		out		smcr,temp
		clr		temp
		sts		timsk0,temp
		ldi		temp,$fe
		out		portb,temp
		cbi		portd,FDS1
		cbi		portd,FDS2
		cbi		portd,FDS4
		sbi		portd,FDS3
		ldi		temp,$06
		sts		pcicr,temp
		sleep	
		clr		temp
		out		smcr,temp
		sts		pcicr,temp
		ldi		temp,$02
		sts		timsk0,temp
		rjmp	wait1

;RIT enter and store current parameters

rit:	clr		dlycnt
rit2:	cpi		dlycnt,5
		brne	rit2
rit1:	sbic	pinc,0
		rjmp	rit3
		cpi		dlycnt,20
		brne	rit1
		rjmp	dfe

rit3:	sbrc	flags,F_RIT
		rjmp	ex_rit
		sbr		flags,FL_RIT
		ldi		zl,low(fbin)
		ldi		zh,high(fbin)
		ldi		yl,low(rit_b)
		ldi		yh,high(rit_b)
		rcall	ram2ram	
r_wt:	sbis	pinc,0
		rjmp	r_wt
		clr		dlycnt
r_wt1:	cpi		dlycnt,3
		brne	r_wt1
		rjmp	wait1	

ex_rit:	cbr		flags,FL_RIT
		ldi		zl,low(rit_b)
		ldi		zh,high(rit_b)
		ldi		yl,low(fbin)
		ldi		yh,high(fbin)
		rcall	ram2ram
		lds		dd3,fbin
		lds		dd4,fbin+1
		lds		dd5,fbin+2
		rcall	offset
		rjmp	r_wt

;tune DDS frequency

l_lmtst: lds	temp,limitl+2
		sub		temp,dd3
		lds		temp,limitl+1
		sbc		temp,dd4
		lds		temp,limitl
		sbc		temp,dd5
		brcs	tn_ok
		ldi		mrenc,$03
		rcall	mrsout
		rjmp	exft

h_lmtst: lds	temp,limith+2
		sub		temp,dd3
		lds		temp,limith+1
		sbc		temp,dd4
		lds		temp,limith
		sbc		temp,dd5
		brcc	tu_ok1
		ldi		mrenc,$03
		rcall	mrsout
		rjmp	exft

tu_ok1:	rjmp	tu_ok
	
tndn:	lds		dd0,fstep
		clr		dd1
		clr		dd2
		lds		dd3,fbin
		lds		dd4,fbin+1
		lds		dd5,fbin+2
		rjmp	l_lmtst
tn_ok:	sub		dd3,dd0		;subtract these registers
		sbc		dd4,dd1
		sbc		dd5,dd2
		sbrs	flag2,F_B20
		rjmp	btx
		sts		fts2,dd3
		sts		fts2+1,dd4
		sts		fts2+2,dd5
		rjmp	tndn1
btx:	sbrs	flag2,F_B30
		rjmp	bty
		sts		fts3,dd3
		sts		fts3+1,dd4
		sts		fts3+2,dd5
		rjmp	tndn1
bty:	sts		fts4,dd3
		sts		fts4+1,dd4
		sts		fts4+2,dd5
tndn1:	rcall	offset

		sbrc	flag2,F_FSTN
		rjmp	fastd
		clr		dlycnt
tdd2:	cpi		dlycnt,1
		brne	tdd2
tndn2:	sbic	pinc,0
		rjmp	exft
		cpi		dlycnt,10
		brne	tndn2
		sbr		flag2,F2_FSTN
		ldi		temp,100
		sts		fstep,temp
		rjmp	tndn

fastd:	clr		dlycnt
tndn3:	sbic	pinc,0
		rjmp	exft
		cpi		dlycnt,3
		brne	tndn3
		rjmp	tndn

exft:	cbr		flag2,F2_FSTN
		ldi		temp,50
		sts		fstep,temp
		rjmp	wait1


	
tnup:	lds		dd0,fstep
		clr		dd1
		clr		dd2
		lds		dd3,fbin
		lds		dd4,fbin+1
		lds		dd5,fbin+2
		rjmp	h_lmtst
tu_ok:	add		dd3,dd0
		adc		dd4,dd1
		adc		dd5,dd2
		sbrs	flag2,F_B20
		rjmp	ubtx
		sts		fts2,dd3
		sts		fts2+1,dd4
		sts		fts2+2,dd5
		rjmp	tnup1
ubtx:	sbrs	flag2,F_B30
		rjmp	ubty
		sts		fts3,dd3
		sts		fts3+1,dd4
		sts		fts3+2,dd5
		rjmp	tnup1
ubty:	sts		fts4,dd3
		sts		fts4+1,dd4
		sts		fts4+2,dd5
tnup1:	rcall	offset

		sbrc	flag2,F_FSTN
		rjmp	fastu
		clr		dlycnt
tdd1:	cpi		dlycnt,1
		brne	tdd1
tnup2:	sbic	pinc,0
		rjmp	exft
		cpi		dlycnt,10
		brne	tnup2
		sbr		flag2,F2_FSTN
		ldi		temp,100
		sts		fstep,temp
		rjmp	tnup

fastu:	clr		dlycnt
tnup3:	sbic	pinc,0
		rjmp	exft
		cpi		dlycnt,3
		brne	tnup3
		rjmp	tnup


offset: cli
		sts		fbin,dd3	;store the new operating freq
		sts		fbin+1,dd4
		sts		fbin+2,dd5
		rcall	bin2bcd		
		rcall	calpwd		

		lds		dv0,foffset	;load IF offset constant
		lds		dv1,foffset+1
		lds		dv2,foffset+2
		lds		dv3,foffset+3
		
		sbrs	flag2,F_OFADD
		rjmp	offsub

		add		dd0,dv0
		adc		dd1,dv1
		adc		dd2,dv2
		adc		dd3,dv3
		rjmp	off_st
			
offsub:	sub		dd0,dv0
		sbc		dd1,dv1
		sbc		dd2,dv2
		sbc		dd3,dv3

off_st:	sts		frcv,dd0
		sts		frcv+1,dd1
		sts		frcv+2,dd2
		sts		frcv+3,dd3
		rcall	fout			;up date DDS with new frequency
		rcall	seg7
		sei
		ret

;what freq to update?	




fout:	sbrc	flags,F_RIT
		rjmp	rxonly
		lds   	temp,ftword+1
		cbr		temp,$c0
		sbr		temp,$80
		cbi		portd,DDSEN
		rcall	sout
		lds		temp,ftword
		rcall	sout
		lds		dd0,ftword+1
		lds		dd1,ftword+2
		lds		dd2,ftword+3
		rol     dd0
		rol		dd1
		rol		dd2
		rol		dd0
		rol		dd1
		rol		dd2
		mov		temp,dd2
		sbr		temp,$80
		rcall	sout
		mov		temp,dd1
		rcall	sout
		sbi		portd,DDSEN	

rxonly:	lds   	temp,frcv+1
		cbr		temp,$c0
		sbr		temp,$40
		cbi		portd,DDSEN
		rcall	sout
		lds		temp,frcv
		rcall	sout
		lds		dd0,frcv+1
		lds		dd1,frcv+2
		lds		dd2,frcv+3
		rol     dd0
		rol		dd1
		rol		dd2
		rol		dd0
		rol		dd1
		rol		dd2
		mov		temp,dd2
		sbr		temp,$40
		rcall	sout
		mov		temp,dd1
		rcall	sout
		sbi		portd,DDSEN	
		ret

tx_frq:	ldi		temp,$28
		cbi		portd,DDSEN
		rcall	sout
		ldi		temp,$38
		rcall	sout
		sbi		portd,DDSEN
		ret

rx_frq:	ldi		temp,$20
		cbi		portd,DDSEN
		rcall	sout
		clr		temp
		rcall	sout
		sbi		portd,DDSEN
		ret

	
;serial data to DDS
	

sout:	ldi		count,8
		sbi		portd,SCLK
mbits:	rol		temp
		brcs	one
		cbi		portc,SDATA
clk:	cbi		portd,SCLK
		sbi		portd,SCLK
		dec		count
		brne	mbits
		ret	

one:	sbi		portc,SDATA
		rjmp	clk

;straight key transmit
	
sktx: 	
		cbi		portc,MUTE
		rcall	tx_frq
		sbr		flags,FL_SIDETONE
		sbi		portc,TXEN
		rcall	ms_5
skdn:	sbis	pind,DOTIN
		rjmp	skdn
		cbi		portc,TXEN
		cbr		flags,FL_SIDETONE
		cbi		portc,3
		rcall	ms_5
		rcall	rx_frq
		
		sbi		portc,MUTE
		clr		dlycnt
skdy:	sbis	pind,DOTIN
		rjmp	sktx
		cpi		dlycnt,5
		brne	skdy
		rjmp	wait1


ms_5:	ldi		count,26
		ser		temp
trdly:	dec		temp
		brne	trdly
		dec		count
		brne	trdly
		ret	


;keyer routine

pdm_t:	sbr		flags,FL_DOT
		rjmp	pdx2
pdm_h:	sbr		flags,FL_DASH
		rjmp	pdx2
	
pdin_t:	sbr		flags,FL_DOT
		rjmp	pdin
pdin_h:	sbr		flags,FL_DASH
	
	
	
pdin:	ldi		mrenc,$01

		brts	pdx2
		cbi		portc,MUTE
	

		rcall	tx_frq
pdxt:	brts	pdx2
		sbi		portc,TXEN
	
pdx2:	clr		dotcnt
		lds		kcnst,cdak

		sbr		flags,FL_SIDETONE
pdx3:	sbrc	flags,F_DOT
		rjmp	dot

	
dash:	sec
		rol		mrenc
		cbr		flags,FL_DASH		;clr dash flag (b
dash1:	cpi		dotcnt,3
		brne	dash1
dash2:	sbis	pind,DOTIN		;dot paddle
		sbr		flags,FL_DOT		;set dot flag  (bit6)
		cpi		dotcnt,9
		brne	dash2
		sbrc	flags,F_EXE
		sbr		flags,FL_DOT
		rjmp	space
		
dot:	clc
		rol		mrenc
		cbr		flags,FL_DOT
dot1:	cpi		dotcnt,2
		brne	dot1
dot2:	sbis	pind,DASHIN		;dash paddle
		sbr		flags,FL_DASH
		cpi		dotcnt,3
		brne	dot2
		sbrc	flags,F_EXE
		sbr		flags,FL_DASH




space:	clr		dotcnt
		cbi		portc,TXEN
		cbr		flags,FL_SIDETONE
		cbi		portc,3

spa:	sbrc	flags,F_BMODE
		rjmp	splb
		cbr		flags,FL_EXE
		in		temp,pind
		cbr		temp,$f3
		tst		temp
		brne	splb
		sbr		flags,FL_EXE


splb:	cpi		dotcnt,3
		brne	spa
				
		sbrc	flags,F_DOT
		rjmp	pdxt
		sbrc	flags,F_DASH
		rjmp	pdxt
		clr		dotcnt
		brts	me_mode
		rcall	rx_frq
		
		sbi		portc,MUTE
		clr		dlycnt
pd_dy:	sbis	pind,DASHIN
		rjmp	pdin_h
		sbis	pind,DOTIN
		rjmp	pdin_t
		cpi		dlycnt,5
		brne	pd_dy
		rjmp	wait1


me_mode: 
		sbis	pind,DASHIN
		rjmp	pdm_h
		sbis	pind,DOTIN
		rjmp	pdm_t
		cpi		dotcnt,7
		brne	me_mode
		sbrc	flag2,F_DFE
		rjmp	de_cod
		st		z+,mrenc
		cpi		zl,ram_end
		breq	smext
spla:	clr		dotcnt



spl3:	sbis	pind,DASHIN
		rjmp	pdin_h
		sbis	pind,DOTIN
		rjmp	pdin_t
		cpi		dotcnt,21
		brne	spl3
		clr		mrenc

memon:	st		z+,mrenc
		cpi		zl,ram_end
		breq	smext

kpdwt:	sbis	pind,DASHIN
		rjmp	pdin_h
		sbis	pind,DOTIN
		rjmp	pdin_t
		sbis	pinc,0
		rjmp	stkmem
		rjmp	kpdwt


		
entm:	
		ldi		mrenc,$02
		rcall	mrsout
		ldi		mrenc,$07
		rcall	mrsout
entm2:	clr		temp
		sts		timsk1,temp
		ldi		zl,low(kmem)
		ldi		zh,high(kmem)
		set
		cbi		portc,MUTE

		rjmp	kpdwt



stkmem:	cpi		zl,$40
		breq	smext
		cpi		zl,ram_end
		breq	smext
		ser		mrenc
		st		z+,mrenc

;play back message
		clr		dotcnt
stj6:	cpi		dotcnt,7
		brne	stj6

		ldi		zl,low(kmem)
		ldi		zh,high(kmem)		

stj2:	ld		mrenc,z+
		
		cpi		mrenc,$ff

		breq	stj1	
		cpi		mrenc,$00
		breq	wdspace
		rcall	mrsout
		rjmp	stj2

stj1:	sbis	pind,DASHIN
		rjmp	smem1
		sbis	pind,DOTIN
		rjmp	smem2
		sbic	pinc,0
		rjmp	stj1
		rjmp	entm

smext:	ldi		temp,$02
		sts		timsk1,temp
		ldi		mrenc,$19
		rcall	mrsout
		clt
		sbi		portc,MUTE
		rjmp	wait1	


smem1:	clr		eadr
		rjmp	stj5
smem2:	ldi		eadr,$40

stj5:	ldi		zl,low(kmem)
		ldi		zh,high(kmem)
stj4:	ld		mrenc,z+
		rcall	wreed
		cpi		mrenc,$ff
		brne	stj4

		ldi		mrenc,$07
		rcall	mrsout
		ldi		mrenc,$08
		rcall	mrsout
		ldi		temp,$02
		sts		timsk1,temp

		clt
		sbi		portc,MUTE
	
		rjmp	wait1		
	


wdspace:clr		dotcnt
wdsjm:	cpi		dotcnt,21
		brne	wdsjm
		rjmp	stj2



mem1s:	clr		eadr
		rjmp	kmas

mem2s: 	sbis	pind,DOTIN
		rjmp	mem2s

		ldi		eadr,$40	

kmas:	clr		temp
		sts		timsk1,temp
kmac:	rcall	rdeed
		cpi		mrenc,$00
		breq	kwdsp
		cpi		mrenc,$ff
		breq	mexit
		sbis	pind,DOTIN
		rjmp	mexit
		rjmp	mrsx


mexit:	clt
mec:	sbis	pind,DOTIN
		rjmp	mec
		ldi		temp,$02
		sts		timsk1,temp
		rjmp	wait1		


kwdsp:	clr		dotcnt
	
kds:	cpi		dotcnt,21
		brne	kds
		rjmp	kmac

mrsout:	
		ldi		count,$08
mrs4:	rol		mrenc
		dec		count
		brcc	mrs4

mrs2:	
		clr		dotcnt
		lds		kcnst,cdak
		sbr		flags,FL_SIDETONE
		rol		mrenc
		brcs	mdsh	


mdot:	cpi		dotcnt,$03
		brne	mdot
		rjmp	mspace

mdsh:	cpi		dotcnt,$09
		brne	mdsh

mspace:	clr		dotcnt
		cbr		flags,FL_SIDETONE
		cbi		portc,3
msp1:	cpi		dotcnt,$03
		brne	msp1
		dec		count
		brne	mrs2
		clr		dotcnt
mrs3:	cpi		dotcnt,7
		brne	mrs3
		ret

mrsx:	ldi		temp,$08
		mov		r15,temp
xmrs4:	rol		mrenc
		dec		r15
		brcc	xmrs4

	
		cbi		portc,MUTE
		rcall	tx_frq
xmrs2:	sbr		flags,FL_SIDETONE
		sbi		portc,TXEN
		clr		dotcnt
		lds		kcnst,cdak
		rol		mrenc
		brcs	xmdsh	


xmdot:	cpi		dotcnt,$03
		brne	xmdot
		rjmp	xmspace

xmdsh:	cpi		dotcnt,$09
		brne	xmdsh

xmspace:cbi		portc,TXEN
		cbr		flags,FL_SIDETONE
		cbi		portc,3
		clr		dotcnt
xmsp1:	cpi		dotcnt,$03
		brne	xmsp1
xmrs1:	dec		r15
		brne	xmrs2
		clr		dotcnt
xmrs3:	cpi		dotcnt,7
		brne	xmrs3
		rcall	rx_frq
		sbi		portc,MUTE
		rjmp	kmac


;tune up mode

txtoggle:	lds		temp,fdig1
		sts		altdig1,temp
		lds		temp,fdig2
		sts		altdig2,temp
		lds		temp,fdig3
		sts		altdig3,temp
		lds		temp,fdig4
		sts		altdig4,temp
		ldi		temp,$2d
		sts		fdig1,temp
		ser		temp
		sts		fdig2,temp
		sts		fdig3,temp
		sts		fdig4,temp
kywt:	sbis	pinc,0
		rjmp	kywt

		clr		dlycnt
k100:	cpi		dlycnt,3
		brne	k100

kyloop:	sbis	pind,DOTIN
		rjmp	kytx
		sbis	pind,DASHIN
		rjmp	kytx
		sbis	pinc,0
		rjmp	extunem
		rjmp	kyloop

kytx:
		cbi		portc,MUTE
		rcall	tx_frq
		sbr		flags,FL_SIDETONE
		sbi		portc,TXEN
		rcall	ms_5
pdwn:	sbis	pind,DOTIN
		rjmp	pdwn
		sbis	pind,DASHIN
		rjmp	pdwn
		cbi		portc,TXEN
		cbr		flags,FL_SIDETONE
		cbi		portc,3
		rcall	ms_5
		rcall	rx_frq
		sbi		portc,MUTE

		clr		dlycnt
		rjmp	kyloop

extunem: lds	temp,altdig1
		sts		fdig1,temp
		lds		temp,altdig2
		sts		fdig2,temp
		lds		temp,altdig3
		sts		fdig3,temp
		lds		temp,altdig4
		sts		fdig4,temp
		rjmp	r_wt	


;change code speed

speed:	
		clr		dlycnt
spd6:	sbrc	flags,F_STKEY
		rjmp	spd5
		sbis	pind,DASHIN
		rjmp	mem1s
spd5:	sbis	pind,DOTIN
		rjmp	mem2s
		cpi		dlycnt,40
		brne	spd6
		
		sbrc	flags,F_STKEY
		rjmp	r_wt		

		clr		dlycnt
spd4:	sbic	pinc,0
		rjmp	spd0
		cpi		dlycnt,40
		brne	spd4
		ldi		mrenc,$03
		rcall	mrsout
		clr		dlycnt
spd10:	sbic	pinc,0
		rjmp	txtoggle
		cpi		dlycnt,40
		brne	spd10

		ldi		mrenc,$07
		rcall	mrsout
		clr		dlycnt
spd7:	sbic	pinc,0
		rjmp	entm2
		cpi		dlycnt,40
		brne	spd7

		lds		temp,fdig1
		sts		altdig1,temp
		lds		temp,fdig2
		sts		altdig2,temp
		lds		temp,fdig3
		sts		altdig3,temp
		lds		temp,fdig4
		sts		altdig4,temp
		ser		temp
		sts		fdig1,temp
		sts		fdig2,temp
		sts		fdig3,temp
		sts		fdig4,temp

		sbrs	flags,F_BMODE
		rjmp	imode_a
		cbr		flags,FL_BMODE
		ldi		temp,$29
		sts		fdig1,temp
		ldi		mrenc,$18
		rcall	mrsout
		ldi		temp,$01
		out		eearh,temp
		ldi		eadr,$98
		mov		mrenc,flags
		rcall	wreed
		rjmp	spd9


imode_a: sbr	flags,FL_BMODE
		ldi		temp,$81
		sts		fdig1,temp
		ldi		mrenc,$05
		rcall	mrsout
		ldi		temp,$01
		out		eearh,temp
		ldi		eadr,$98
		mov		mrenc,flags
		rcall	wreed

spd9:	sbic	pinc,0
		rjmp	spd8	
		rjmp	spd9

spd0:	cbi		portc,MUTE
		lds		temp,fdig1
		sts		altdig1,temp
		lds		temp,fdig2
		sts		altdig2,temp
		lds		temp,fdig3
		sts		altdig3,temp
		lds		temp,fdig4
		sts		altdig4,temp
		ldi		temp,$35
		sts		fdig1,temp
		ser		temp
		sts		fdig2,temp
		lds		r0,cs_bcd
		rjmp	csdply
		
spd1:	
		sbis	pind,DASHIN
		rjmp	cdspup
		sbis	pind,DOTIN
		rjmp	cdspdn
spd3:	cpi		dlycnt,40
		brne	spd1
spd8:	lds		temp,altdig1
		sts		fdig1,temp
		lds		temp,altdig2
		sts		fdig2,temp
		lds		temp,altdig3
		sts		fdig3,temp
		lds		temp,altdig4
		sts		fdig4,temp

		sbi		portc,MUTE
		rjmp	wait1
	
	
cdspdn:	lds		temp,cdsp
		cpi		temp,0
		breq	gtk
		dec		temp
		sts		cdsp,temp
		rjmp	gtk
	
cdspup:	lds		temp,cdsp
		cpi		temp,30
		breq	gtk
		inc		temp
		sts		cdsp,temp
	
gtk:	lsl		temp
		ldi		zh,high(cdtbl*2)
		ldi		zl,low(cdtbl*2)
		add		zl,temp
		clr		temp
		adc		zh,temp
		lpm	
		sts		cdak,r0
		mov		kcnst,r0
		adiw	zh:zl,1
		lpm
		sts		cs_bcd,r0

csdply: sts		fbcd1,r0
		clr		r27
		rcall	seg7a
		 

sssp:	ldi		mrenc,$02
		rcall	mrsout
		clr		dlycnt
		rjmp	spd1

cdtbl:	.db	$65,$05
		.db	$54,$06
		.db	$48,$07
		.db	$3f,$08
		.db	$38,$09
		.db	$33,$10
		.db	$2e,$11
		.db	$2a,$12
		.db	$27,$13 
		.db	$24,$14
		.db	$22,$15
		.db	$20,$16
		.db	$1e,$17 
		.db	$1c,$18
		.db	$1b,$19
		.db	$19,$20
		.db	$18,$21 
		.db	$17,$22
		.db	$16,$23
		.db	$15,$24
		.db	$14,$25 
		.db	$14,$26
		.db	$13,$27
		.db	$12,$28
		.db	$11,$29
		.db	$11,$30
		.db	$10,$32 
		.db	$0f,$34
		.db	$0e,$36 
		.db	$0d,$38
		.db	$0c,$40
	

;calculate phase word
	
calpwd:	
		clr		dd0	;clear lower 3 bytes of 
		clr		dd1	;dividen (multiply by 2^28)
		clr		dd2
		clr		dr0	;clear remander
		clr		dr1	;clear remander
		clr		dr2	;clear remander
		lds		dv0,ref_fre	;load ref freq word
		lds		dv1,ref_fre+1	;(binary)
		lds		dv2,ref_fre+2
		lds		dv3,ref_fre+3
		lds		dd3,fbin	;load operating frequecy word
		lds		dd4,fbin+1 ;inary)
		lds		dd5,fbin+2
	
		ldi		count,57	;init loop counter
		sub		dr3,dr3	;clear carry and remander high byte
	
d16_1:	rol		dd0	;shift left dividend
		rol		dd1
		rol		dd2
		rol		dd3
		rol		dd4
		rol		dd5
		dec		count	;decrement counter
		brne	d16_2	;branch if not done
		sts		ftword,dd0
		sts		ftword+1,dd1
		sts		ftword+2,dd2
		sts		ftword+3,dd3
		ret
	
d16_2:	rol		dr0	;shift dividend into remainder
		rol		dr1
		rol		dr2
		rol		dr3
		sub		dr0,dv0	;remainder = remainder - divisor
		sbc		dr1,dv1	;
		sbc		dr2,dv2
		sbc		dr3,dv3
		brcc	d16_3	;if result negative
		add		dr0,dv0	;restore remainder
		adc		dr1,dv1
		adc		dr2,dv2
		adc		dr3,dv3
		clc		;clear carry to be shifted into result
		rjmp	d16_1	;else
d16_3:	sec		;set carry to be shifted into result
		rjmp	d16_1



bin2bcd:
			mov		fbin0,dd3
			mov		fbin1,dd4
			mov		fbin2,dd5
		
genbcd:		ldi		count,24
			clr		bcd3
			clr		bcd2
			clr		bcd1
			clr		bcd0
			clc

bbcdx_1:	lsl		fbin0
			rol		fbin1
			rol		fbin2
			rol		bcd0
			rol		bcd1
			rol		bcd2
			rol		bcd3
			dec		count
			brne	bbcdx_2
			sts		fbcd0,bcd0
			sts		fbcd1,bcd1
			sts		fbcd2,bcd2
			sts		fbcd3,bcd3
			ret

bbcdx_2:	ldi		r30,atbcd3+1
			clr		zh
bbcdx_3:	ld		temp,-z
			subi	temp,-$03
			sbrc	temp,3
			st		z,temp
			ld		temp,z
			subi	temp,-$30
			sbrc	temp,7
			st		z,temp
			cpi		zl,atbcd0
			brne	bbcdx_3
			rjmp	bbcdx_1

seg7:	
			ldi		zl,low(segtb*2)
			ldi		zh,high(segtb*2)
			lds		temp,fbcd2
			cbr		temp,$f0
			add		zl,temp
			clr		temp
			adc		zh,temp
			lpm
			sts		fdig2,r0

			lds		temp,fbcd2
			swap	temp
			cbr		temp,$f0
			ldi		zl,low(segtb*2)
			ldi		zh,high(segtb*2)
			add		zl,temp
			clr		temp
			adc		zh,temp
			lpm
			sts		fdig1,r0

seg7a:		ldi		zl,low(segtb*2)
			ldi		zh,high(segtb*2)
			lds		temp,fbcd1
			cbr		temp,$f0
			add		zl,temp
			clr		temp
			adc		zh,temp
			lpm
			sts		fdig4,r0

			lds		temp,fbcd1
			swap	temp
			cbr		temp,$f0
			ldi		zl,low(segtb*2)
			ldi		zh,high(segtb*2)
			add		zl,temp
			clr		temp
			adc		zh,temp
			lpm
			sts		fdig3,r0
			ret

segtb:		.db	$11,$db
			.db	$07,$43
			.db	$c9,$61
			.db	$29,$d3
			.db	$01,$c1
			.db	$ef,$ff



flash2ram:
		lpm			;get constant
		st		Y+,r0		;store in SRAM and increment Y-pointer
		adiw	zh:zl,1		;increment Z-pointer
		dec		temp
		brne	flash2ram	;if not end of table, loop more
		ret				

ram2ram:ldi		count,4
ramloop:ld		temp,Z+	;get data from BLOCK1
		st		Y+,temp	;store data to BLOCK2
		dec		count		;
		brne	ramloop		;if not done, loop more
		ret
	
	
	
;eeprom write

wreed:	
		out		EEARL,eadr	;output address
		out		EEDR,mrenc	;output data
		sbi		eecr,eemwe
		sbi		EECR,EEWE	;set EEPROM Write strobe
wre1:	sbic	EECR,EEWE	;if EEWE not clear
		rjmp	wre1		;    wait1 more
		inc		eadr
		ret

;eeprom read

rdeed:	out		EEARL,eadr	;output address
		sbi		EECR,EERE	;set EEPROM Read strobe
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
		sbi		EECR,EERE	;set EEPROM Read strobe 2nd time
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
		in		mrenc,EEDR	;get dat
		inc		eadr
		ret

dfe:	sbrc	flags,F_STKEY
		rjmp	r_wt
		sbrc	flags,F_RIT
		rjmp	r_wt
		ldi		mrenc,$0c
		rcall	mrsout

		cbi		portc,MUTE
		ldi		temp,$aa
		mov		de_bcd0,temp
		mov		de_bcd1,temp
		ldi		count,4
		sbr		flag2,F2_DFE
		
		lds		temp,fbcd0
		sts		altdig1,temp
		lds		temp,fbcd1
		sts		altdig2,temp
		lds		temp,fbcd2
		sts		altdig3,temp
		lds		temp,fbcd3
		sts		altdig4,temp
		clr		temp
		sts		fbcd0,temp
		ldi		temp,$aa
		sts		fbcd1,temp
		sts		fbcd2,temp	
		rcall	seg7
desw:	sbis	pinc,0
		rjmp	desw
		clr		dlycnt
desw1:	cpi		dlycnt,2
		brne	desw1
		set

de_wt:	sbis	pind,DOTIN
		rjmp	pdin_t
		sbis	pind,DASHIN
		rjmp	pdin_h
		sbis	pinc,0
		rjmp	abort
		rjmp	de_wt


de_cod: ser		temp
		cpi		mrenc,$03
		brne	md_0
		clr		temp

md_0:	cpi		mrenc,$3f
		brne	md_1
		clr		temp

md_1:	cpi		mrenc,$2f
		brne	md_2
		ldi		temp,$10

md_2:	cpi		mrenc,$27
		brne	md_3
		ldi		temp,$20

md_3:	cpi		mrenc,$23
		brne	md_4
		ldi		temp,$30

md_4:	cpi		mrenc,$21
		brne	md_5
		ldi		temp,$40

md_5:	cpi		mrenc,$20
		brne	md_6
		ldi		temp,$50

md_6:	cpi		mrenc,$30
		brne	md_7
		ldi		temp,$60

md_7:	cpi		mrenc,$38
		brne	md_8
		ldi		temp,$70

md_8:	cpi		mrenc,$3c
		brne	md_9
		ldi		temp,$80

md_9:	cpi		mrenc,$3e
		brne	md_10
		ldi		temp,$90
		
md_10:	cpi		temp,$ff
		breq	error			

df_shf:	rol		temp
		rol		de_bcd0
		rol		de_bcd1
		rol		temp
		rol		de_bcd0
		rol		de_bcd1
		rol		temp
		rol		de_bcd0
		rol		de_bcd1
		rol		temp
		rol		de_bcd0
		rol		de_bcd1
		sts		fbcd1,de_bcd0
		sts		fbcd2,de_bcd1
		rcall	seg7
		dec		count

		brne	de_wt
	
		ldi		mrenc,$03
		rcall	mrsout	
		rcall	bcd2bin32
		lds		temp,limitl+2
		sub		temp,dd3
		lds		temp,limitl+1
		sbc		temp,dd4
		lds		temp,limitl
		sbc		temp,dd5
		brcc	offlimit
		lds		temp,limith+2
		sub		temp,dd3
		lds		temp,limith+1
		sbc		temp,dd4
		lds		temp,limith
		sbc		temp,dd5
		brcs	offlimit

		rcall	offset

		sbi		portc,MUTE
		cbr		flag2,F2_DFE
		clt
		rjmp	wait1
		
error:	ldi		mrenc,$4c
		push	count
		rcall	mrsout
		pop		count
		rjmp	de_wt

abort:	
		lds		temp,altdig1
		sts		fbcd0,temp
		lds		temp,altdig2
		sts		fbcd1,temp
		lds		temp,altdig3
		sts		fbcd2,temp
		lds		temp,altdig4
		sts		fbcd3,temp
		rcall	seg7
abrt:	cbr		flag2,F2_DFE

		sbi		portc,MUTE
		clt		
		rjmp	r_wt


offlimit: lds		dd3,fbin
		lds		dd4,fbin+1
		lds		dd5,fbin+2
		rcall	offset
		rjmp	abrt

bcd2bin32:
		clr		dd3
		clr		dd4
		clr		dd5
		clr		dv0
		ldi		count,3
		ldi		zl,low(fbcd3)
		ldi		zh,high(fbcd3)
		ld		temp,z
		swap	temp
		andi	temp,$0f
		mov		dd3,temp
		ld		temp,z
		rcall	mul10b
	
cn_lop:	ld		temp,-z
		rcall	mul10a
		ld		temp,z
		rcall	mul10b
		dec		count
		brne	cn_lop
		ret
	
mul10a:	;***** multiplies "mp10H:mp10L" with 10 and adds "adder" high nibble 
		swap	temp
mul10b:	;***** multiplies "mp10H:mp10L" with 10 and adds "adder" low nibble 
		mov		dd0,dd3	;make copy
		mov		dd1,dd4
		mov		dd2,dd5	
		lsl		dd3		;multiply original by 2
		rol		dd4
		rol		dd5	
		rcall	shift
		rcall	shift
		rcall	shift	
		add		dd3,dd0	;add copy to original
		adc		dd4,dd1
		adc		dd5,dd2		
		andi	temp,0x0f	;mask away upper nibble of adder
		add		dd3,temp	;add lower nibble of adder
		adc		dd4,dv0
		adc		dd5,dv0

m10_1:	ret	

shift:	lsl		dd0		;multiply copy by 2
		rol		dd1
		rol		dd2

		ret


cal_rf:	ldi		temp,$60
		sts		admux,temp
		ldi		temp,$e6
		sts		adcsra,temp

		clr		temp
		sts		ref_fre,temp
		ldi		temp,$08	;50mhz
		sts		ref_fre+1,temp
		ldi		temp,$af	;50mhz
		sts		ref_fre+2,temp
		ldi		temp,$2f	;50mhz
		sts		ref_fre+3,temp


		ldi		temp,$35
		sts		fdig1,temp
		ldi		temp,$81
		sts		fdig2,temp
		ldi		temp,$3d
		sts		fdig3,temp
		ldi		temp,$af
		sts		fdig4,temp

		ldi		temp,$80
		sts		fbin,temp
		ldi		temp,$96
		sts		fbin+1,temp
		ldi		temp,$98
		sts		fbin+2,temp

		ldi		temp,$50
		mov		r14,temp
		clr		r15
		
		rcall	calpwd
		rcall	fout
		rcall	tx_frq

rf_tw1:	sbis	pinc,0
		rjmp	rf_tw1

		clr		dlycnt
rf_tw2:	cpi		dlycnt,10
		brne	rf_tw2


rf_tw:	lds		temp,adch
		cpi		temp,230
		brsh	rf_tw
		cpi		temp,90
		brsh	rf_dn
		cpi		temp,70
		brsh	rf_up
		cpi		temp,40
		brsh	rf_tw
		rjmp	rf_done

rf_up:	lds		dd0,ref_fre
		lds		dd1,ref_fre+1
		lds		dd2,ref_fre+2
		lds		dd3,ref_fre+3

		add		dd0,r14
		adc		dd1,r15
		adc		dd2,r15
		adc		dd3,r15
		rjmp	st_rf

rf_dn:	lds		dd0,ref_fre
		lds		dd1,ref_fre+1
		lds		dd2,ref_fre+2
		lds		dd3,ref_fre+3

		sub		dd0,r14
		sbc		dd1,r15
		sbc		dd2,r15
		sbc		dd3,r15

st_rf:	sts		ref_fre,dd0
		sts		ref_fre+1,dd1
		sts		ref_fre+2,dd2
		sts		ref_fre+3,dd3
		rcall	calpwd
		rcall	fout
		clr		dlycnt
rf_td1:	cpi		dlycnt,10
		brne	rf_td1
		rjmp	rf_tw


rf_done: clr	temp
		out		eearh,temp
		ldi		eadr,$90
		lds		mrenc,ref_fre
		rcall	wreed
		lds		mrenc,ref_fre+1
		rcall	wreed
		lds		mrenc,ref_fre+2
		rcall	wreed
		lds		mrenc,ref_fre+3
		rcall	wreed

c_ofst:	ldi		temp,$2b
		sts		fdig4,temp

		ldi		temp,$a7
		mov		r14,temp

		ldi		temp,$5f	;50mhz
		sts		frcv,temp
		ldi		temp,$9f	;50mhz
		sts		frcv+1,temp
		ldi		temp,$92	;50mhz
		sts		frcv+2,temp
		ldi		temp,$01
		sts		frcv+3,temp

		rcall	rxonly
		rcall	rx_frq


		sbi		portc,MUTE
		sbr		flags,FL_SIDETONE

pc_wt1:	sbis	pinc,0
		rjmp	pc_wt1

		clr		dlycnt
pc_wt2:	cpi		dlycnt,10
		brne	pc_wt2	
	
		
fr_swt:	lds		temp,adch
		cpi		temp,230
		brsh	fr_swt
		cpi		temp,90
		brsh	rf_osa
		cpi		temp,70
		brsh	rf_oss
		cpi		temp,40
		brsh	fr_swt
		rjmp	os_done

rf_osa:	lds		dd0,frcv
		lds		dd1,frcv+1
		lds		dd2,frcv+2
		lds		dd3,frcv+3

		add		dd0,r14
		adc		dd1,r15
		adc		dd2,r15
		adc		dd3,r15

		rjmp	rf_osw

rf_oss:	lds		dd0,frcv
		lds		dd1,frcv+1
		lds		dd2,frcv+2
		lds		dd3,frcv+3

		sub		dd0,r14
		sbc		dd1,r15
		sbc		dd2,r15
		sbc		dd3,r15


rf_osw:	sts		frcv,dd0
		sts		frcv+1,dd1
		sts		frcv+2,dd2
		sts		frcv+3,dd3
		rcall	rxonly
		clr		dlycnt
frsw:	cpi		dlycnt,10
		brne	frsw
		rjmp	fr_swt

os_done:ldi		eadr,$94
		lds		mrenc,frcv
		rcall	wreed
		lds		mrenc,frcv+1
		rcall	wreed
		lds		mrenc,frcv+2
		rcall	wreed
		lds		mrenc,frcv+3
		rcall	wreed
		clr		temp
		out		eearh,temp
		rjmp	reset